PCB AS A PRIMITIVE FPGA
A 1S1R primitive can be used by customers as a one-time programmable link element within PCB routing tiles, strap networks, or configurable interconnect regions.
This can enable late-stage configuration choices and post-assembly selection of circuit options without installing additional routing components.
What customers typically explore
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Option selection tiles to support multiple product variants from one PCB design
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Configurable strap networks for pin mapping, feature enables, or hardware ID states
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Link matrices to support controlled rerouting inside a defined tile region
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Write once lock in of a configuration during manufacturing test
Why 1S1R is relevant
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The WORM resistive element can be used as an irreversible open/closed or high/low link.
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The selector element’s directionality can reduce unintended conduction paths in matrix tiles.
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PCB manufacturability supports large-area, low-cost configurable regions.
Important note
This page is suggestive and describes how customers may choose to explore OTP interconnect concepts. Azoulaye Synapse does not design customer routing architectures and does not provide legal clearance for specific end-use implementations.